Basic Iadder diagram

A ladder diagram consists of a downward line on the left side with lines branching to the right. Existing lines on the left side is called the bus bar (bus bar), whereas the branch lines (the branching lines) are lines of instructions or steps. Instructions are placed along a variety of conditions linked to the other instructions on the right side. The combination of logic from the underlying condition is declared when and how the existing instructions on the right side is done.


Figure 1. Example of ladder diagram

As shown in Figure 1 is, along the lines branching instruction can be more then join again. Pairs of vertical lines (like the symbol of the capacitor) is what is called the condition. The pair of vertical lines that do not exist diagonal line called the Normal Open - Open or NO and normally associated with the instruction LOAD (LD), AND or OR. While the pair of vertical lines that there was a diagonal line called Normal Closed - Close or NC and normally associated with the instructions LD NOT, AND NOT or OR NOT. The figures contained in each condition in the first picture is a bit operand instruction. Status bits associated with each of these conditions which determine the condition of execution of the next instruction.

Instruction LOAD (LD) and NOT LOAD (LD NOT)
The first condition that started in an arbitrary logic block diagram of the steps associated with the instruction LOAD (LD) or LD NOT. (LD NOT). Each of these instructions requires one line of mnemonic code. Examples for these instructions is shown in Figure 2.

Figure 2. Sample instructions and LD LD NOT

As shown in Figure 2, since only the instruction LOAD or LD NOT just in the line of instructions (instruction line), then the execution condition for instruction in his right hand is ON when its ON condition. For example ladder diagram, the LD instruction (ie to the normal open), the execution condition will be ON if IR000.00 also ON; otherwise, to LD NOT instruction (ie to the normally closed), the condition will execute if IR000.00 ON OFF conditions .

Instruksi AND dan AND NOT

If there are two or more conditions that are connected in series on the same instruction line, then the first condition using LD or LD NOT instruction and the remainder using AND or AND NOT instructions. In the third picture shows a fragment of the ladder diagram containing the three conditions that are connected in series on the same line and instructions relating to the instruction LD, AND NOT and AND. And just as before, each of these instructions requires one line of mnemonic code.

Figure 3. An example of AND and AND NOT

Instructions described the far right itself (figure 3) will have ON execution condition when the third condition in his left everything ON, in this case in a state IR000.00 ON, OFF and IR010.00 LR00.00 conditions in the ON condition.

Instructions can be imagined INTERNATIONAL ON will result if two conditions are connected with this instruction in the ON condition of all, if one only in OFF condition, let alone both OFF, the instruction will always result INTERNATIONAL OFF as well.

OR and OR NOT instructions

If two or more conditions are connected in parallel, meaning that a different instruction in the line and then joined again in one line the same instruction, then the first condition associated with LD or LD NOT instruction and the remainder related to OR or OR NOT instruction. IV.6 images shown on three conditions associated with the instruction LD NOT, OR, NOT and OR. Again, each of these instructions requires one line of mnemonic code.

Figure 4.Examples of the use of OR and OR NOT

Block this instruction will have an ON execution condition when enough one of the three conditions in the ON state, for example IR000.00 in OFF condition, the condition IR0100.00 LR00.00 OFF or ON condition.

In this case the OR instruction can be imagined will always generate ON execution condition if one of two or more conditions connected with this instruction in the ON condition.